1. Technical Field
The present invention relates generally to semiconductor fabrication, and more particular, to a P-N junction device and a method of forming same.
2. Related Art
Vertical P-N junction devices are used for various purposes. For example, low capacitance radio frequency (RF) diodes are needed for RF applications, RF switches, phase-lock loop circuits and low capacitance RF electrostatic discharge (ESD) elements. FIG. 1 shows one conventional P-N junction silicon diode 10. In this particular device, a P++ anode 12 is formed below a silicon surface 14 by ion implantation. One shortcoming of these devices is that a high parasitic resistance path is created under the shallow trench isolation (STI) 15 from cathode contact 16 to cathode 18, i.e., N-well/N+ subcollector. Another shortcoming of these devices is that they typically require a large cathode implant area to ensure coverage of the intrinsic anode 12 and all contact regions 16. The large cathode increases parasitic capacitance to substrate 20. FIGS. 2-3 show other P-N junction devices that suffer from the same problems. FIG. 2 shows another conventional P-N diode 40, this time in the form of a silicon germanium (SiGe) P-N diode in which the raised anode 42 covers all of the opening within STI 45. Contact regions 46 are still required in this structure. FIG. 3 shows a conventional PiN diode 60, which is substantially similar to FIG. 2, except that it includes an intrinsic layer 62. PiN diodes and similarly structured photodiodes and high voltage diodes are useful for higher voltage applications, photo-detectors, high speed switches, and ESD elements. Another P-N junction device that suffers from the above problems is a thyristor, which is used for high voltage, switching devices and ESD applications.
In view of the foregoing, there is a need in the art for a solution that addresses the problems of P-N junction devices.